初版可以用，但是最后一个位解析有问题。
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##
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## This file is part of the libsigrokdecode project.
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##
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## Copyright (C) 2012 Uwe Hermann <uwe@hermann-uwe.de>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, see <http://www.gnu.org/licenses/>.
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##
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'''
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I²C (Inter-Integrated Circuit) is a bidirectional, multi-master
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bus using two signals (SCL = serial clock line, SDA = serial data line).
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'''
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from .pd import Decoder
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##
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## This file is part of the libsigrokdecode project.
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##
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## Copyright (C) 2010-2016 Uwe Hermann <uwe@hermann-uwe.de>
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## Copyright (C) 2019 DreamSourceLab <support@dreamsourcelab.com>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, see <http://www.gnu.org/licenses/>.
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##
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# BiSS-C decoder (default): MSB-first, sample on SCL rising edge.
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# Frame: 25 data bits + 6 CRC (CRC-6, polynomial x^6 + x^1 + x^0 (0x43) commonly used in BiSS)
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import sigrokdecode as srd
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'''
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OUTPUT_PYTHON format:
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Packet:
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[<ptype>, <pdata>]
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<ptype>:
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- 'START' (START condition)
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- 'START REPEAT' (Repeated START condition)
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- 'ADDRESS READ' (Slave address, read)
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- 'ADDRESS WRITE' (Slave address, write)
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- 'DATA READ' (Data, read)
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- 'DATA WRITE' (Data, write)
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- 'STOP' (STOP condition)
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- 'ACK' (ACK bit)
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- 'NACK' (NACK bit)
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- 'BITS' (<pdata>: list of data/address bits and their ss/es numbers)
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<pdata> is the data or address byte associated with the 'ADDRESS*' and 'DATA*'
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command. Slave addresses do not include bit 0 (the READ/WRITE indication bit).
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For example, a slave address field could be 0x51 (instead of 0xa2).
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For 'START', 'START REPEAT', 'STOP', 'ACK', and 'NACK' <pdata> is None.
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'''
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# CMD: [annotation-type-index, long annotation, short annotation]
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proto = {
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'START': [0, 'Start', 'S'],
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'DATA READ': [1, 'Start repeat', 'Sr'],
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'STOP': [2, 'Stop', 'P'],
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'DATA READ1': [3, 'ACK', 'A'],
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'DATA READ2': [4, 'NACK', 'N'],
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'BIT': [5, 'Bit', 'B'],
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'ERR': [6, 'Address read', 'AR'],
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'CRC': [7, 'Address write', 'AW'],
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'DATA READ': [8, 'Data read', 'DR'],
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'DATA WRITE': [9, 'Data write', 'DW'],
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}
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class Decoder(srd.Decoder):
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api_version = 3
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id = '1:biss'
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name = '1:BiSS'
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longname = 'BiSS-C Encoder/Decoder'
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desc = 'BiSS-C position sensor serial protocol (default decoding)'
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license = 'gplv2+'
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inputs = ['logic']
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outputs = ['biss']
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tags = ['Embedded/industrial']
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channels = (
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{'id': 'scl', 'type': 8, 'name': 'SCL', 'desc': 'Clock', 'idn':'dec_1biss_chan_scl'},
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{'id': 'sda', 'type': 108, 'name': 'SDA', 'desc': 'Serial data line', 'idn':'dec_1i2c_chan_sda'},
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)
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annotations = (
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('7', 'start', 'Start condition'),
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('6', 'repeat-start', 'Repeat start condition'),
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('1', 'stop', 'Stop condition'),
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('5', 'ack', 'ACK'),
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('0', 'nack', 'NACK'),
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('208', 'bit', 'Data/address bit'),
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('112', 'address-read', 'Address read'),
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('111', 'address-write', 'Address write'),
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('110', 'data-read', 'Data read'),
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('109', 'data-write', 'Data write'),
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)
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annotation_rows = (
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('bits', 'Bits', (5,)),
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('addr-data', 'Address/Data', (0, 1, 2, 3, 4, 6, 7, 8, 9)),
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('warnings', 'Warnings', (10,)),
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)
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binary = (
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('address-read', 'Address read'),
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('address-write', 'Address write'),
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('data-read', 'Data read'),
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('data-write', 'Data write'),
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)
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def __init__(self):
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self.reset()
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def reset(self):
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self.samplerate = None
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self.ss = self.es = self.ss_byte = -1
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self.bitcount = 0
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self.databyte = 0
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self.state = 'FIND START'
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self.pdu_start = None
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self.pdu_bits = 0
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self.bits = []
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def metadata(self, key, value):
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if key == srd.SRD_CONF_SAMPLERATE:
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self.samplerate = value
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def start(self):
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self.out_python = self.register(srd.OUTPUT_PYTHON)
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self.out_ann = self.register(srd.OUTPUT_ANN)
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self.out_binary = self.register(srd.OUTPUT_BINARY)
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self.out_bitrate = self.register(srd.OUTPUT_META,
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meta=(int, 'Bitrate', 'Bitrate from Start bit to Stop bit'))
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def putx(self, data):
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self.put(self.ss, self.es, self.out_ann, data)
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def putp(self, data):
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self.put(self.ss, self.es, self.out_python, data)
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def putb(self, data):
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self.put(self.ss, self.es, self.out_binary, data)
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def handle_start(self):
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self.ss, self.es = self.samplenum, self.samplenum
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self.pdu_start = self.samplenum
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self.pdu_bits = 0
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cmd = 'START'
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self.putp([cmd, None])
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self.putx([proto[cmd][0], proto[cmd][1:]])
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self.state = 'FIND DATA'
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self.bitcount = self.databyte = 0
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self.bits = []
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# Gather 8 bits of data plus the ACK/NACK bit.
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def handle_data(self, scl, sda,cmd,size,next_state):
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self.pdu_bits += 1
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# Address and data are transmitted MSB-first.
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self.databyte <<= 1
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self.databyte |= sda
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# Remember the start of the first data/address bit.
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if self.bitcount == 0:
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self.ss_byte = self.samplenum
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# Store individual bits and their start/end samplenumbers.
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# In the list, index 0 represents the LSB (I2C transmits MSB-first).
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self.bits.insert(0, [sda, self.samplenum, self.samplenum])
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if self.bitcount > 0:
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self.bits[1][2] = self.samplenum
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if self.bitcount == (size - 1):
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self.bitwidth = self.bits[0][2] - self.bits[1][2]
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self.bits[0][2] += self.bitwidth
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# Return if we haven't collected all 8 + 1 bits, yet.
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if self.bitcount < size:
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self.bitcount += 1
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return
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d = self.databyte
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bin_class = -1
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self.ss, self.es = self.ss_byte, self.samplenum + self.bitwidth
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self.putp(['BITS', self.bits])
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self.putp([cmd, d])
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self.putb([bin_class, d])
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for bit in self.bits:
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self.put(bit[1], bit[2], self.out_ann, [5, ['%d' % bit[0]]])
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self.putx([proto[cmd][0], ['%s: {$}' % proto[cmd][1], '%s: {$}' % proto[cmd][2], '{$}', d]])
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# Done with this packet.
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self.bitcount = self.databyte = 0
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self.bits = []
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self.state = next_state
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def handle_stop(self):
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# Meta bitrate
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if self.samplerate:
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elapsed = 1 / float(self.samplerate) * (self.samplenum - self.pdu_start + 1)
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bitrate = int(1 / elapsed * self.pdu_bits)
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self.put(self.ss_byte, self.samplenum, self.out_bitrate, bitrate)
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cmd = 'STOP'
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self.ss, self.es = self.samplenum, self.samplenum
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self.putp([cmd, None])
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self.putx([proto[cmd][0], proto[cmd][1:]])
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self.state = 'FIND START'
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self.bits = []
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def decode(self):
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while True:
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# State machine.
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if self.state == 'FIND START':
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self.wait({0: 'h', 1: 'f'})
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self.handle_start()
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elif self.state == 'FIND DATA':
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(scl, sda) = self.wait([{0: 'f'}])
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self.handle_data(scl, sda,'DATA READ',2,'FIND DATA1')
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elif self.state == 'FIND DATA1':
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(scl, sda) = self.wait([{0: 'f'}])
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self.handle_data(scl, sda,'DATA READ1',6,'FIND DATA2')
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elif self.state == 'FIND DATA2':
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(scl, sda) = self.wait([{0: 'f'}])
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self.handle_data(scl, sda,'DATA READ2',13,'FIND ERR')
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elif self.state == 'FIND ERR':
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(scl, sda) = self.wait([{0: 'f'}])
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self.handle_data(scl, sda,'ERR',2,'FIND CRC')
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elif self.state == 'FIND CRC':
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(scl, sda) = self.wait([{0: 'f'}])
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self.handle_data(scl, sda,'CRC',6,'FIND STOP')
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elif self.state == 'FIND STOP':
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(scl, sda) = self.wait([{0: 'h', 1: 'r'}])
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self.handle_stop()
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