262 lines
9.2 KiB
Python
262 lines
9.2 KiB
Python
##
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## This file is part of the libsigrokdecode project.
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##
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## Copyright (C) 2019 Uli Huber
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## Copyright (C) 2020 Soeren Apel
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, see <http://www.gnu.org/licenses/>.
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##
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import sigrokdecode as srd
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ann_bit, ann_bit2, ann_stat_bit, ann_type, ann_command, ann_parameter, ann_parity, ann_pos, ann_pos2, ann_logic_x, ann_logic_y, ann_status, ann_warning = range(13)
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frame_type_none, frame_type_command, frame_type_16bit_pos, frame_type_18bit_pos = range(4)
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class Decoder(srd.Decoder):
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api_version = 3
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id = 'xy2-100-bsl'
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name = 'XY2-100-bsl'
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longname = 'XY2-100(E) and XY-200(E) galvanometer protocol'
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desc = 'Serial protocol for galvanometer positioning in laser systems'
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license = 'gplv2+'
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inputs = ['logic']
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outputs = []
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tags = ['Embedded/industrial']
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# 你要的 options
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options = (
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{'id': 'worksize', 'desc': '振镜区域大小', 'default': 60},
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{'id': 'resolution', 'desc': '振镜分辨率', 'default': 65536},
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{'id': 'filename', 'desc': '解码输出文件名','default':'d:/xy2-100.csv'},
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)
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channels = (
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{'id': 'clk', 'name': 'CLK', 'desc': 'Clock'},
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{'id': 'sync', 'name': 'SYNC', 'desc': 'Sync'},
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{'id': 'data', 'name': 'DATA X', 'desc': 'X axis data'},
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{'id': 'data2', 'name': 'DATA Y', 'desc': 'Y axis data'},
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)
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optional_channels = (
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{'id': 'status', 'name': 'STAT', 'desc': 'X, Y or Z axis status'},
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)
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annotations = (
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('bit', 'Data Bit X'),
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('bit2', 'Data Bit Y'),
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('stat_bit', 'Status Bit'),
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('type', 'Frame Type'),
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('command', 'Command'),
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('parameter', 'Parameter'),
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('parity', 'Parity'),
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('position', 'Position X'),
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('position2', 'Position Y'),
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('logic_x', 'Logic X'),
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('logic_y', 'Logic Y'),
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('status', 'Status'),
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('warning', 'Human-readable warnings'),
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)
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annotation_rows = (
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('bits', 'Data Bits X', (ann_bit,)),
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('bits2', 'Data Bits Y', (ann_bit2,)),
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('stat_bits', 'Status Bits', (ann_stat_bit,)),
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('data', 'Data', (ann_type, ann_command, ann_parameter, ann_parity)),
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('positions', 'Positions X', (ann_pos,)),
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('positions2', 'Positions Y', (ann_pos2,)),
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('logic_x', 'Logic X', (ann_logic_x,)),
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('logic_y', 'Logic Y', (ann_logic_y,)),
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('statuses', 'Statuses', (ann_status,)),
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('warnings', 'Warnings', (ann_warning,)),
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)
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def __init__(self):
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self.samplerate = None
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self.filename = ""
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self.file = None
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self.x=0
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self.y=0
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self.z=0
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self.reset()
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def reset(self):
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self.bits = []
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self.bits2 = []
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self.stat_bits = []
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self.stat_skip_bit = True
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def metadata(self, key, value):
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if key == srd.SRD_CONF_SAMPLERATE:
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self.samplerate = value
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self.filename = self.options['filename']
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def start(self):
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self.out_ann = self.register(srd.OUTPUT_ANN)
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# 读取配置参数
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self.worksize = self.options['worksize']
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self.resolution = self.options['resolution']
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self.half_res = self.resolution / 2
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def put_ann(self, ss, es, ann_class, value):
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self.put(ss, es, self.out_ann, [ann_class, value])
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# 计算逻辑坐标
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def calc_logic(self, raw_pos):
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return (raw_pos - self.half_res) * self.worksize / self.resolution
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def process_bit(self, sync, bit_ss, bit_es, bit_value, bit_value2):
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# X 轴
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self.put_ann(bit_ss, bit_es, ann_bit, ['%d' % bit_value])
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self.bits.append((bit_ss, bit_es, bit_value))
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# Y 轴
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self.put_ann(bit_ss, bit_es, ann_bit2, ['%d' % bit_value2])
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self.bits2.append((bit_ss, bit_es, bit_value2))
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if sync == 0:
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self.process_frame(self.bits, ann_pos, ann_logic_x, 0)
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self.process_frame(self.bits2, ann_pos2, ann_logic_y, 1)
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self.reset()
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def process_frame(self, bits, pos_ann_id, logic_ann_id,is_y):
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if len(bits) < 20:
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self.put_ann(bits[0][0], bits[-1][1], ann_warning, ['Not enough data bits'])
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return
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parity = 0
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for ss, es, value in bits[:-1]:
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parity ^= value
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par_ss, par_es, par_value = bits[19]
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parity_even = (par_value == parity)
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parity_odd = not parity_even
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type_1_value = bits[0][2]
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type_3_value = (bits[0][2] << 2) | (bits[1][2] << 1) | bits[2][2]
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type = frame_type_none
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parity_status = ['OK'] if parity_even else ['NOK']
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type_ss = bits[0][0]
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type_es = bits[2][1]
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if (type_1_value == 1) and (parity_odd == 1):
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type = frame_type_18bit_pos
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type_es = bits[0][1]
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elif (type_3_value == 1):
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type = frame_type_16bit_pos
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if not parity_even:
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self.put_ann(bits[0][0], bits[-1][1], ann_warning, ['Parity error'])
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elif (type_3_value == 7) and (parity_even == 1):
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type = frame_type_command
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else:
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self.put_ann(bits[0][0], bits[-1][1], ann_warning, ['Unknown frame'])
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return
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if type == frame_type_16bit_pos:
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self.put_ann(type_ss, type_es, ann_type, ['16bit Position'])
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if type == frame_type_18bit_pos:
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self.put_ann(type_ss, type_es, ann_type, ['18bit Position'])
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if type == frame_type_command:
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self.put_ann(type_ss, type_es, ann_type, ['Command'])
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self.put_ann(par_ss, par_es, ann_parity, parity_status)
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pos = 0
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if type == frame_type_16bit_pos:
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count = 15
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for ss, es, value in bits[3:19]:
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pos |= value << count
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count -= 1
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elif type == frame_type_18bit_pos:
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count = 17
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for ss, es, value in bits[3:19]:
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pos |= value << count
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count -= 1
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pos = pos if pos < 131072 else pos - 262144
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if(is_y==1):
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self.y=pos
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if self.filename != "":
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self.file.write('%d,%d,%d\n' % (self.x, self.y, self.z))
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else:
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self.x=pos
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# 显示原始位置
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if type in (frame_type_16bit_pos, frame_type_18bit_pos):
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self.put_ann(type_es, par_ss, pos_ann_id, ['%d' % pos])
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# 显示逻辑坐标(3位小数)
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logic_val = self.calc_logic(pos)
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self.put_ann(type_es, par_ss, logic_ann_id, ['%.3f' % logic_val])
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if type == frame_type_command:
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count = 7
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cmd = 0
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cmd_es = 0
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for ss, es, value in bits[3:11]:
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cmd |= value << count
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count -= 1
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cmd_es = es
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self.put_ann(type_es, cmd_es, ann_command, ['Cmd 0x%X' % cmd])
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count = 7
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param = 0
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for ss, es, value in bits[11:19]:
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param |= value << count
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count -= 1
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self.put_ann(cmd_es, par_ss, ann_parameter, ['Param 0x%X' % param])
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def process_stat_bit(self, sync, bit_ss, bit_es, bit_value):
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if self.stat_skip_bit:
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self.stat_skip_bit = False
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return
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self.put_ann(bit_ss, bit_es, ann_stat_bit, ['%d' % bit_value])
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self.stat_bits.append((bit_ss, bit_es, bit_value))
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if (sync == 0) and (len(self.stat_bits) == 19):
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stat_ss = self.stat_bits[0][0]
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stat_es = self.stat_bits[18][1]
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status = 0
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count = 18
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for ss, es, value in self.stat_bits:
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status |= value << count
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count -= 1
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self.put_ann(stat_ss, stat_es, ann_status, ['Status 0x%X' % status])
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def decode(self):
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if self.filename != "":
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self.file = open(self.filename,'a')
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self.file.write('x,y,z\n')
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bit_ss = None
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bit_value = 0
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bit_value2 = 0
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stat_ss = None
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stat_value = 0
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sync_value = 0
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has_stat = self.has_channel(4)
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while True:
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clk, sync, data, data2, stat = self.wait({0: 'e'})
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if clk == 1:
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stat_value = stat
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bit_es = self.samplenum
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if bit_ss is not None:
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self.process_bit(sync_value, bit_ss, bit_es, bit_value, bit_value2)
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bit_ss = self.samplenum
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else:
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bit_value = data
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bit_value2 = data2
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sync_value = sync
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if stat_ss is not None and has_stat:
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stat_es = self.samplenum
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self.process_stat_bit(sync_value, stat_ss, stat_es, stat_value)
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stat_ss = self.samplenum |